Shmoo plot

In electrical engineering, a shmoo plot is a graphical display of the response of a component or system varying over a range of conditions and inputs. Often used to represent the results of the testing of complex electronic systems such as computers or integrated circuits such as DRAMs, ASICs or microprocessors. The plot usually shows the range of conditions in which the device under test operates (in adherence with some remaining set of specifications). The term was in use in 1970 to refer to the "tuning" of ferrite core memory stacks on IBM systems.